ISL6439, ISL6439A
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted V CC = 3.3V±5% and T A = +25°C (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
GATE DRIVERS
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
I UGATE-SRC V BOOT - V PHASE = 5V, V UGATE = 4V
I UGATE-SNK
I LGATE-SRC V VCC = 3.3V, V LGATE = 4V
I LGATE-SNK
-
-
-
-
-1
1
-1
2
-
-
-
-
A
A
A
A
PROTECTION / DISABLE
OCSET Current Source
Disable Threshold
I OCSET
V DISABLE
Commercial
Industrial
18
16
-
20
20
-
22
22
0.8
μ A
μ A
V
Functional Pin Description
14 LEAD SOIC
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
GND 1
LGATE 2
CPVOUT 3
CT1 4
CT2 5
OCSET 6
FB 7
16 LEAD 5x5 QFN
14 UGATE
13 BOOT
12 PHASE
11 VCC
10 CPGND
9 ENABLE
8 COMP
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
upper MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
CPVOUT
CT1
1
2
16
15
14
13
12 PHASE
11 VCC
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-Channel MOSFET.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin provides
CT2
3
10 CPGND
the PWM-controlled gate drive for the lower MOSFET. This pin
OCSET
4
9
NC
is also monitored by the adaptive shoot-through protection
circuitry to determine when the lower MOSFET has turned off.
5
6
7
8
OCSET
Connect a resistor (R OCSET ) from this pin to the drain of the
upper MOSFET (V IN ). R OCSET , an internal 20 μ A current
VCC
This pin provides the bias supply for the ISL6439. Connect a
well-decoupled 3.3V supply to this pin.
source (I OCSET ), and the upper MOSFET on-resistance
(r DS(ON) ) set the converter overcurrent (OC) trip point
according to Equation 1:
I PEAK = -------------------------------------------------
COMP and FB
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the internal
error amplifier and the COMP pin is the error amplifier
I OCSET xR OCSET
r DS ( ON )
An overcurrent trip cycles the soft-start function.
(EQ. 1)
output. These pins are used to compensate the voltage-
control feedback loop of the converter.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
6
ENABLE
This pin is the open-collector enable pin. Pulling this pin to a
level below 0.8V will disable the controller. Disabling the
ISL6439 causes the oscillator to stop, the LGATE and
UGATE outputs to be held low, and the softstart circuitry to
re-arm.
FN9057.5
November 5, 2008
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相关代理商/技术参数
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ISL6439IBZ-T 功能描述:IC REG CTRLR BUCK PWM VM 14-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
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